Why does the external PLL in the Lock-In Amplifier have a non-zero phase offset?
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The Moku Lock-In Amplifier offers several demodulation source options, including an external phase locked-loop (PLL) on the second input channel of the device.
A PLL locks the internal demodulation oscillator to the frequency of an external reference with zero steady-state phase error at its internal comparison point. Since Moku's digital PLL datapath is pipelined and includes inherent processing latency, the internal phase alignment appears as a fixed phase offset when observed externally. A fixed delay τ corresponds to a phase shift of φ = 2πfτ, so the offset is fixed for a given reference frequency and scales linearly with frequency. It is deterministic rather than arbitrary: the same offset is observed each time lock is re-acquired, with no drift. It can therefore be compensated using the phase-shift parameter in the demodulation.
To illustrate how to correct for the offset, consider two sine waves going into Input 1 and Input 2 of the LIA with a 0 degree phase offset:

If we compare the phase offset before and after the PLL, we can see a fixed phase offset of -80.64 degrees:

We can correct for this by setting the phase shift to 80.64 degrees:

Now, the signals going into the mixer have a 0 degree phase offset:
